| People | Locations | Statistics |
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| Naji, M. |
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| Motta, Antonella |
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| Aletan, Dirar |
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| Mohamed, Tarek |
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| Ertürk, Emre |
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| Taccardi, Nicola |
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| Kononenko, Denys |
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| Petrov, R. H. | Madrid |
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| Alshaaer, Mazen | Brussels |
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| Bih, L. |
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| Casati, R. |
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| Muller, Hermance |
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| Kočí, Jan | Prague |
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| Šuljagić, Marija |
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| Kalteremidou, Kalliopi-Artemi | Brussels |
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| Azam, Siraj |
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| Ospanova, Alyiya |
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| Blanpain, Bart |
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| Ali, M. A. |
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| Popa, V. |
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| Rančić, M. |
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| Ollier, Nadège |
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| Azevedo, Nuno Monteiro |
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| Landes, Michael |
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| Rignanese, Gian-Marco |
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Van Driel, Willem
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Publications (20/20 displayed)
- 2024Training Convolutional Neural Networks with Confocal Scanning Acoustic Microscopy Imaging for Power QFN Package Delamination Classification
- 2023Heterogeneous Integration of Diamond Heat Spreaders for Power Electronics Applicationcitations
- 2022Interphase effect on the effective moisture diffusion in epoxy–SiO2 compositescitations
- 2021Facile synthesis of ag nanowire/tio2 and ag nanowire/tio2/go nanocomposites for photocatalytic degradation of rhodamine bcitations
- 2021Exploring water and ion transport process at silicone/copper interfaces using in-situ electrochemical and Kelvin probe approachescitations
- 2018Solid State Lighting Reliability Part 2
- 2016Creep fatigue models of solder jointscitations
- 2015An overview of scanning acoustic microscope, a reliable method for non-destructive failure analysis of microelectronic componentscitations
- 2010Designing for reliability using a new Wafer Level Package structure
- 2009Virtual Prototyping for PPM-level Failures in Microelectronic Packages
- 2009Reliability of Wafer Level Thin Film MEMS Packages during Wafer Backgrinding
- 2008Effect of aging of packaging materials on die surface cracking of a SiP carrier
- 2008Die Fracture Probability Prediction and Design Guidelines for Laminate-Based Over-Molded Packages
- 2007Modeling of the mechanical stiffness of the GaP/GaAs nanowires with point defects/stacking faults
- 2007Efficient damage sensitivity analysis of advanced Cu/low-k bond pad structures by means of the area release energy criterion
- 2007Correlation between chemistry of polymer building blocks and microelectronics reliability
- 2007Measuring the through-plane elastic modulus of thin polymer films in situ
- 2007Characterization of moisture properties of polymers for IC packaging
- 2006Mixed Mode Bending Test for Interfacial Adhesion in Semiconductor Applications
- 2005The precision of large radio continuum source catalogues. An application of the SPECFIND toolcitations
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document
Modeling of the mechanical stiffness of the GaP/GaAs nanowires with point defects/stacking faults
Abstract
The semiconductor type III-V nanowires (e.g., GaAs, GaP, InAs, InP, etc.) has excellent electronic/optical properties for the application of next-generation nano-scaled transistor, light-emitting diode and bio/chemical sensors. However, the electronic conductance of the nanowire is highly sensitive to the internal stress/strain condition under external loadings. In this paper, the mechanical stiffness of the GaAs and GaP nanowires are simulated, and the trend of the results are validated by the bulk experiments. The mechanical influence of the point defect and the stacking faults are considered. Moreover, an analytical solution is established to describe the mechanical stiffness decreasing of the stacking faults. The simulations indicate that the mechanical stiffness of the nanowire is influenced by the density of the stacking faults and the density of covalent bonds at the twin-dislocation interface.Key Words: III-V nano-scaled semiconductors, Molecular dynamics calculations, Stacking faults, Mechanical properties.