| People | Locations | Statistics |
|---|---|---|
| Naji, M. |
| |
| Motta, Antonella |
| |
| Aletan, Dirar |
| |
| Mohamed, Tarek |
| |
| Ertürk, Emre |
| |
| Taccardi, Nicola |
| |
| Kononenko, Denys |
| |
| Petrov, R. H. | Madrid |
|
| Alshaaer, Mazen | Brussels |
|
| Bih, L. |
| |
| Casati, R. |
| |
| Muller, Hermance |
| |
| Kočí, Jan | Prague |
|
| Šuljagić, Marija |
| |
| Kalteremidou, Kalliopi-Artemi | Brussels |
|
| Azam, Siraj |
| |
| Ospanova, Alyiya |
| |
| Blanpain, Bart |
| |
| Ali, M. A. |
| |
| Popa, V. |
| |
| Rančić, M. |
| |
| Ollier, Nadège |
| |
| Azevedo, Nuno Monteiro |
| |
| Landes, Michael |
| |
| Rignanese, Gian-Marco |
|
Lind, Erik
Lund University
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (23/23 displayed)
- 2023Low temperature atomic hydrogen annealing of InGaAs MOSFETscitations
- 2023Time evolution of surface species during the ALD of high-k oxide on InAscitations
- 2023Time evolution of surface species during the ALD of high-k oxide on InAscitations
- 2023Tuning of Quasi-Vertical GaN FinFETs Fabricated on SiC Substratescitations
- 2023Three-Dimensional Integration of InAs Nanowires by Template-Assisted Selective Epitaxy on Tungstencitations
- 2022Oxygen relocation during HfO2 ALD on InAscitations
- 2022Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performance.
- 2022Template-Assisted Selective Epitaxy of InAs on W
- 2021Doping Profiles in Ultrathin Vertical VLS-Grown InAs Nanowire MOSFETs with High Performancecitations
- 2020Atomic Layer Deposition of Hafnium Oxide on InAs : Insight from Time-Resolved in Situ Studiescitations
- 2020Atomic Layer Deposition of Hafnium Oxide on InAscitations
- 2016ZrO2 and HfO2 dielectrics on (001) n-InAs with atomic-layer-deposited in situ surface treatmentcitations
- 2016ZrO2 and HfO2 dielectrics on (001) n-InAs with atomic-layer-deposited in situ surface treatmentcitations
- 2014InAs nanowire MOSFETs in three-transistor configurations: single balanced RF down-conversion mixers.citations
- 2014Thin electron beam defined hydrogen silsesquioxane spacers for vertical nanowire transistorscitations
- 2013Interface characterization of metal-HfO2-InAs gate stacks using hard x-ray photoemission spectroscopy
- 2013Combining axial and radial nanowire heterostructures: Radial Esaki diodes and tunnel field-effect transistorscitations
- 2012Al2O3/InAs metal-oxide-semiconductor capacitors on (100) and (111)B substratescitations
- 2012High-Frequency Performance of Self-Aligned Gate-Last Surface Channel In0.53Ga0.47As MOSFETcitations
- 2011High Transconductance Self-Aligned Gate-Last Surface Channel In0.53Ga0.47As MOSFET
- 2011Interface composition of atomic layer deposited HfO2 and Al2O3 thin films on InAs studied by X-ray photoemission spectroscopycitations
- 2004Resonant tunneling permeable base transistor based pulsed oscillator
- 2004Tunneling Based Electronic Devices
Places of action
| Organizations | Location | People |
|---|
thesis
Tunneling Based Electronic Devices
Abstract
This thesis concerns different kinds of tunneling based devices all showing negative differential resistance. The thesis is divided in three parts, resonant tunneling transistors, Esaki diodes and coupled zero dimensional systems.<br/> <br/> The resonant tunneling transistors are GaAs-based vertical field effects transistors, based on a combination of overgrown tungsten gates and double barrier heterostructures. The gate is placed in direct vicinity of the heterostructure, and due to Schottky depletion around the gate the effective conducting area of the heterostructure can be controlled. Transistors based on two different double barriers have been investigated, GaAs0.3P0.7 and Al0.8Ga0.2As/GaAs/In0.2Ga0.8As. The GaAsP-system were used for low temperature operation, whereas the AlGaAs was optimized for room temperature functionality. For resonant tunneling diode structures, a peak current density of 70 kA/cm2, a peak-to-valley ratio of 4 with a peak voltage of 0.3V was obtained, all at room temperature. The transistors has a simultaneously a maximum transconductance gm=120 mS/mm, and a peak-to-valley ratio of 2.5. Further on, a transistor based on three dimensional integration of two resonant tunnel diodes and a single metallic gate has been demonstrated.<br/> <br/> The same technology has also been used to fabricate structures for coupled low dimensional systems. Studies of transport between a single impurity and an electrostatically defined quantum dot were preformed at a temperature T=0.3 K and B-fields up to 12 T. The resulting data shows that the angular momentum of the electrons are conserved during the tunneling event.<br/> <br/> SiGe Esaki Tunnel Diodes has been fabricated using a combined approach of ultra high vacuum chemical vapor deposition epitaxial growth and proximity rapid thermal diffusion. This process is suitable for integration of tunnel diodes with mainstream SiGe-technology. The diodes shows a peak current density of 0.18 kA/cm2 and a peak-to-valley ratio of 2.6 at room temperature.