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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Kiihamäki, Jyrki
VTT Technical Research Centre of Finland
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (8/8 displayed)
- 2013Micromechanical resonator array and method for manufacturing thereof
- 2010Low-Temperature Processes for MEMS Device Fabricationcitations
- 2009Etching of Sacrificial CVD Silicon Dioxide with Anhydrous HF Vaporcitations
- 2005Fabrication of SOI micromechanical devices
- 2005Fabrication of SOI micromechanical devices:Dissertation
- 2004Electrical and mechanical properties of micromachined vacuum cavitiescitations
- 2003"Plug-up" - A new concept for fabricating SOI MEMS devicescitations
- 2000Deceleration of silicon etch rate at high aspect ratioscitations
Places of action
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thesis
Fabrication of SOI micromechanical devices
Abstract
This work reports on studies and the fabrication processdevelopment of micromechanical silicon-on-insulator (SOI)devices. SOI is a promising starting material forfabrication of single crystal silicon micromechanicaldevices and basis for monolithic integration of sensorsand integrated circuits. The buried oxide layer of an SOIwafer offers an excellent etch stop layer for siliconetching and sacrificial layer for fabrication ofcapacitive sensors. Deep silicon etching is studied andthe aspect ratio dependency of the etch rate and loadingeffects are described and modeled. The etch rate of thedeep silicon etching process is modeled with a simpleflow conductance model, which takes into account only theinitial etch rate and reaction probability and flowresistance of the etched feature. The used model predictsqualitatively the aspect-ratio-dependent etch rate forvarying trench widths and rectangular shapes. The designrelated loading can be modeled and the effects of theloading can be minimized with proper etch mask design.The basic SOI micromechanics process is described and thedrawbacks and limitations of the process are discussed.Improvements to the process are introduced as well as IRmicroscopy as a new method to inspect the sacrificialetch length of the SOI structure.A new fabrication process for SOI micromechanics has beendeveloped that alleviates metallization problems duringthe wet etching of the sacrificial layer. The process isbased on forming closed cavities under the structurelayer of SOI with the help of a semi-permeablepolysilicon film.Prototype SOI device fabrication results are presented.High Q single crystal silicon micro resonators havepotential for replacing bulky quartz resonators in clockcircuits. Monolithic integration of micromechanicaldevices and an integrated circuit has been demonstratedwith the developed process using the embedded vacuumcavities.