Materials Map

Discover the materials research landscape. Find experts, partners, networks.

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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Materials Map under construction

The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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693.932 PEOPLE
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Kiihamäki, Jyrki

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VTT Technical Research Centre of Finland

in Cooperation with on an Cooperation-Score of 37%

Topics

Publications (8/8 displayed)

  • 2013Micromechanical resonator array and method for manufacturing thereofcitations
  • 2010Low-Temperature Processes for MEMS Device Fabrication7citations
  • 2009Etching of Sacrificial CVD Silicon Dioxide with Anhydrous HF Vapor1citations
  • 2005Fabrication of SOI micromechanical devicescitations
  • 2005Fabrication of SOI micromechanical devices:Dissertationcitations
  • 2004Electrical and mechanical properties of micromachined vacuum cavities4citations
  • 2003"Plug-up" - A new concept for fabricating SOI MEMS devices3citations
  • 2000Deceleration of silicon etch rate at high aspect ratios28citations

Places of action

Chart of shared publication
Jaakkola, Antti
1 / 2 shared
Pensala, Tuomas
1 / 17 shared
Blomberg, Martti
1 / 4 shared
Saarilahti, Jaakko
1 / 4 shared
Laamanen, Mari
1 / 3 shared
Rissanen, Anna
1 / 2 shared
Kattelus, Hannu
2 / 8 shared
Pekko, Panu
2 / 2 shared
Puurunen, Riikka
1 / 8 shared
Ritala, Heini
2 / 4 shared
Häärä, Ari
1 / 1 shared
Mattila, Tomi
2 / 11 shared
Ronkainen, Hannu
1 / 3 shared
Sillanpää, Teuvo
1 / 7 shared
Chart of publication period
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Co-Authors (by relevance)

  • Jaakkola, Antti
  • Pensala, Tuomas
  • Blomberg, Martti
  • Saarilahti, Jaakko
  • Laamanen, Mari
  • Rissanen, Anna
  • Kattelus, Hannu
  • Pekko, Panu
  • Puurunen, Riikka
  • Ritala, Heini
  • Häärä, Ari
  • Mattila, Tomi
  • Ronkainen, Hannu
  • Sillanpää, Teuvo
OrganizationsLocationPeople

thesis

Fabrication of SOI micromechanical devices

  • Kiihamäki, Jyrki
Abstract

This work reports on studies and the fabrication processdevelopment of micromechanical silicon-on-insulator (SOI)devices. SOI is a promising starting material forfabrication of single crystal silicon micromechanicaldevices and basis for monolithic integration of sensorsand integrated circuits. The buried oxide layer of an SOIwafer offers an excellent etch stop layer for siliconetching and sacrificial layer for fabrication ofcapacitive sensors. Deep silicon etching is studied andthe aspect ratio dependency of the etch rate and loadingeffects are described and modeled. The etch rate of thedeep silicon etching process is modeled with a simpleflow conductance model, which takes into account only theinitial etch rate and reaction probability and flowresistance of the etched feature. The used model predictsqualitatively the aspect-ratio-dependent etch rate forvarying trench widths and rectangular shapes. The designrelated loading can be modeled and the effects of theloading can be minimized with proper etch mask design.The basic SOI micromechanics process is described and thedrawbacks and limitations of the process are discussed.Improvements to the process are introduced as well as IRmicroscopy as a new method to inspect the sacrificialetch length of the SOI structure.A new fabrication process for SOI micromechanics has beendeveloped that alleviates metallization problems duringthe wet etching of the sacrificial layer. The process isbased on forming closed cavities under the structurelayer of SOI with the help of a semi-permeablepolysilicon film.Prototype SOI device fabrication results are presented.High Q single crystal silicon micro resonators havepotential for replacing bulky quartz resonators in clockcircuits. Monolithic integration of micromechanicaldevices and an integrated circuit has been demonstratedwith the developed process using the embedded vacuumcavities.

Topics
  • impedance spectroscopy
  • single crystal
  • Silicon
  • forming
  • microscopy
  • wet etching