Materials Map

Discover the materials research landscape. Find experts, partners, networks.

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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Bonnaud, K. Mourgues F. Raoult T. Mohammed-Brahim K. Kis-Sion D. Briand O.

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in Cooperation with on an Cooperation-Score of 37%

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Publications (1/1 displayed)

  • 2001Thin film transistors fabricated by in-situ doped unhydrogenated polysilicon films obtained by solid phase crystallizationcitations

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Pichon, Laurent
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2001

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  • Pichon, Laurent
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article

Thin film transistors fabricated by in-situ doped unhydrogenated polysilicon films obtained by solid phase crystallization

  • Bonnaud, K. Mourgues F. Raoult T. Mohammed-Brahim K. Kis-Sion D. Briand O.
  • Pichon, Laurent
Abstract

High mobility low temperature (≤ 600°C) unhydrogenated in-situ doped polysilicon thin film transistors are made. Polysilicon layers are grown by a LPCVD technique and crystallized in vacuum by a thermal annealing. Source and drain regions are in-situ doped. Gate insulator is made of an APCVD silicon dioxide. Hydrogen passivation is not performed on the transistors. One type of transistors is made of two polysilicon layers, the other one is constituted of a single polysilicon layer. The electrical properties are better for transistors made of single polysilicon layer: a low threshold voltage (1.2 V), a subthreshold slope S = 0.7 V/dec, a high field effect mobility (≈ 100 cm2/Vs) and a On/Off state current ratio higher than 107 for a drain voltage Vds = 1 V. At low drain voltage, for both transistors, the Off state current results from a pure thermal emission of trapped carriers. However, at high drain voltage, the electrical behavior is different: in the case of single polysilicon TFTs, the current obeys the field-assisted (Poole-Frenkel) thermal emission model of trapped carriers while for TFTs made of two polysilicon layers, the higher Off state current results from a field-enhanced thermal emission.

Topics
  • impedance spectroscopy
  • phase
  • mobility
  • thin film
  • Hydrogen
  • Silicon
  • annealing
  • crystallization