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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Pichon, Laurent
Institut d'Électronique et des Technologies du numéRique
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (8/8 displayed)
- 2022Comparative study on quantitative carbon content mapping in archaeological ferrous metals with laserinduced plasma spectroscopy (LIBS) and nuclear reaction analysis (NRA) for 3D representation by LIBScitations
- 2021In-depth analysis of electrical characteristics for polycrystalline silicon vertical thin film transistorscitations
- 2019Industrial production of white earthenware in the Johnston-Vieillard manufactory (19th century): recipes evolution and production strategies
- 2009Fabrication of polycrystalline silicon nanowires using conventional UV lithography
- 2009Improvement in the determination by 1/f noise measurements of the interface state distribution in polysilicon TFTs in relation with the compensation law of Meyer Neldelcitations
- 2008Low frequency Noise in Polysilicon Thin Film Transistors: Effect of the Laser Annealing of the Active Layer
- 2004Compatibility of p-metal oxide semiconductor technology with the epitaxial YBa2CU3O7-delta growth on Si
- 2001Thin film transistors fabricated by in-situ doped unhydrogenated polysilicon films obtained by solid phase crystallization
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article
Thin film transistors fabricated by in-situ doped unhydrogenated polysilicon films obtained by solid phase crystallization
Abstract
High mobility low temperature (≤ 600°C) unhydrogenated in-situ doped polysilicon thin film transistors are made. Polysilicon layers are grown by a LPCVD technique and crystallized in vacuum by a thermal annealing. Source and drain regions are in-situ doped. Gate insulator is made of an APCVD silicon dioxide. Hydrogen passivation is not performed on the transistors. One type of transistors is made of two polysilicon layers, the other one is constituted of a single polysilicon layer. The electrical properties are better for transistors made of single polysilicon layer: a low threshold voltage (1.2 V), a subthreshold slope S = 0.7 V/dec, a high field effect mobility (≈ 100 cm2/Vs) and a On/Off state current ratio higher than 107 for a drain voltage Vds = 1 V. At low drain voltage, for both transistors, the Off state current results from a pure thermal emission of trapped carriers. However, at high drain voltage, the electrical behavior is different: in the case of single polysilicon TFTs, the current obeys the field-assisted (Poole-Frenkel) thermal emission model of trapped carriers while for TFTs made of two polysilicon layers, the higher Off state current results from a field-enhanced thermal emission.