Materials Map

Discover the materials research landscape. Find experts, partners, networks.

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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Topics

Publications (1/1 displayed)

  • 2021Fabrication of Silicon Nanowire Metal-Oxide-Semiconductor Capacitors with Al2O3/TiO2/Al2O3 Stacked Dielectric Films for the Application to Energy Storage Devices8citations

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Gotoh, Kazuhiro
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Kato, Shinya
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2021

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  • Gotoh, Kazuhiro
  • Kato, Shinya
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article

Fabrication of Silicon Nanowire Metal-Oxide-Semiconductor Capacitors with Al2O3/TiO2/Al2O3 Stacked Dielectric Films for the Application to Energy Storage Devices

  • Gotoh, Kazuhiro
  • Kato, Shinya
  • Nezasa, Ryota
Abstract

<jats:p>Silicon nanowire (SiNW) metal-oxide-semiconductor (MOS) capacitors with Al2O3/TiO2/Al2O3 (ATA) stacked dielectric films were fabricated by metal-assisted chemical etching (MACE) and atomic layer deposition (ALD). High-angle annular dark field scanning transmission electron microscopy (HAADF-STEM) images revealed that SiNWs were conformally coated with ATA although the cross-sectional shapes of MACE-SiNWs were non-uniform and sharp spikes can be seen locally. The dielectric capacitance density of 5.9 μF/cm2 at V = −4 V of the perfect accumulation region was achieved due to the combination of the large surface area of the SiNW array and the high dielectric constant of ATA. The capacitance changed exponentially with the voltage at V &lt; −4.3 V and the capacitance of 84 μF/cm2 was successfully achieved at V = −10 V. It was revealed that not only 3D structure and high-k material but also local nanostructure of SiNWs and stacked dielectric layers could contribute to the considerable high capacitance.</jats:p>

Topics
  • density
  • surface
  • dielectric constant
  • semiconductor
  • transmission electron microscopy
  • Silicon
  • etching
  • atomic layer deposition