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| Naji, M. |
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| Motta, Antonella |
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| Mohamed, Tarek |
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| Azevedo, Nuno Monteiro |
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| Landes, Michael |
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Schmidbauer, Martin
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (8/8 displayed)
- 2024Electronic Synapses Enabled by an Epitaxial SrTiO3-δ / Hf0.5Zr0.5O2 Ferroelectric Field-Effect Memristor Integrated on Silicon
- 2024Selective Growth of GaP Crystals on CMOS-Compatible Si Nanotip Wafers by Gas Source Molecular Beam Epitaxycitations
- 2023Electronic Synapses Enabled by an Epitaxial SrTiO<sub>3‐δ</sub> / Hf<sub>0.5</sub>Z<sub>r0.5</sub>O<sub>2</sub> Ferroelectric Field‐Effect Memristor Integrated on Siliconcitations
- 2023Y‐Stabilized ZrO2 as a Promising Wafer Material for the Epitaxial Growth of Transition Metal Dichalcogenides
- 2022Monolithic and catalyst-free selective epitaxy of InP nanowires on Silicon
- 2017Strain engineering of ferroelectric domains in KxNa1−xNbO3 epitaxial layers
- 2017Scanning X-ray nanodiffraction from ferroelectric domains in strained K0.75Na0.25NbO3 epitaxial films grown on (110) TbScO3
- 2017Strain Engineering of Ferroelectric Domains in $KxNa_{1−x}NbO_3$ Epitaxial Layerscitations
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document
Monolithic and catalyst-free selective epitaxy of InP nanowires on Silicon
Abstract
<jats:title>Abstract</jats:title><jats:p>The integration of both optical and electronic components on a single chip, despite the challenge, holds the promise of compatibility with CMOS technology and high scalability. Among all candidate materials, III-V semiconductor nanostructures are key ingredients for opto-electronics and quantum optics devices, such as light emitters and harvesters. The control over geometry, and dimensionality of the nanostructures, enables one to modify the band structures, and hence provide a powerful tool for tailoring the opto-electronic properties of III-V compounds. One of the most creditable approaches towards such growth control is the combination of using patterned wafer and the self-assembled epitaxy. This work presents monolithically integrated catalyst-free InP nanowires grown selectively on nanotip-patterned (001)Si substrates using gas-source molecular-beam epitaxy. The substrates are fabricated using CMOS nanotechnology. The dimensionality of the InP structures can be switched between two-dimensional nanowires and three-dimensional bulk-like InP islands by thermally modifying the shape of Silicon nanotips, surrounded by the SiO<jats:sub>2</jats:sub> layer during the oxide-off process. The structural and optical characterization of nanowires indicate the coexistence of both zincblende and wurtzite InP crystal phases in nanowires. The two different crystal structures were aligned with a type-II heterointerface.</jats:p>