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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Basim, G. Bahar
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article
Palladium Chemical Mechanical Planarization in Packaging and Barrier Level Integration
Abstract
<jats:p>Palladium (Pd) is a chemically inert material known for its ability to improve processing cost and reliability for the packaging level microelectronics integration. In addition, it is used as a sacrificial layer for copper (Cu) integration as a barrier material to protect the copper from oxidation. Successful implementation of Pd requires chemical mechanical planarization (CMP) process in both applications, where selectivity is desired between the Cu, tantalum nitride (TaN), and nitride (Ni) films against Pd. This paper focuses on removal rate selectivity tuning for Pd thin films in a commercial silica-based Cu-CMP slurry compared to a baseline silica slurry as a function of the slurry temperature. Detailed analyses of the integrated materials are presented, investigating the effect of temperature on surface wettability and CMP selectivity. Pd passivation is also presented by electrochemical analysis in the presence of an oxidizer for the selected polishing slurries. It is observed that lowering the slurry temperature promotes palladium CMP removal rate selectivity against Ni, Cu, and TaN by modifying slurry viscosity and wafer surface wettability with no detrimental effect observed on the surface defectivity.</jats:p>