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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Romaniuk, Ryszard S.
in Cooperation with on an Cooperation-Score of 37%
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Publications (9/9 displayed)
- 2021Review of Ph.D. Thesis in Biomedical Engineering: Agata Baranowska (Białystok University of technology), Development of lanthanide-doped fibers for use in biodegradable composites
- 2020Optical absorption studies of (Ga0.1In0.9)2Se3 thin filmcitations
- 2017Optimization of the compositions area of radiotransparent ceramic in the SrO-Al$_2$O$_$3-SiO$_2$ systemcitations
- 2015Development of low noise CCD readout front-end citations
- 2014Photonics Applications in Astronomy, Communications, Industry, and High Energy Physics Experiments 2014citations
- 2014The Fast Beam Condition Monitor BCM1F Backend Electronics Upgraded MicroTCA Based Architecturecitations
- 2013Optical Fiber Technology 2012citations
- 2005Optical network and FPGA/DSP based control system for free electon laser
- 2003Cavity Digital Control Testing System by Simulink Step Operation Method for TESLA Linear Accelerator and Free Electron Laser
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document
Development of low noise CCD readout front-end
Abstract
This paper describes development of low noise readout subsystem for digital camera dedicated for astronomical observations. Main aim of the study is noise reduction in regard of sensor's output signal and noise added by the analogue electronics. Basic concept and simulation results of analogue front-end are presented. Various Digital Signal Processing schemes are considered in order to increase Signal to Noise ratio. Another step of development are design of the prototype PCB board and implementation of selected processing techniques in to the structure of a FPGA device.