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| Naji, M. |
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| Motta, Antonella |
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| Aletan, Dirar |
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| Mohamed, Tarek |
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| Ertürk, Emre |
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| Taccardi, Nicola |
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| Kononenko, Denys |
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| Petrov, R. H. | Madrid |
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| Alshaaer, Mazen | Brussels |
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| Bih, L. |
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| Casati, R. |
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| Muller, Hermance |
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| Kočí, Jan | Prague |
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| Šuljagić, Marija |
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| Kalteremidou, Kalliopi-Artemi | Brussels |
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| Azam, Siraj |
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| Ospanova, Alyiya |
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| Blanpain, Bart |
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| Ali, M. A. |
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| Popa, V. |
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| Rančić, M. |
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| Ollier, Nadège |
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| Azevedo, Nuno Monteiro |
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| Landes, Michael |
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| Rignanese, Gian-Marco |
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Mastrangeli, Massimo
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (8/8 displayed)
- 2022Maximization of Transmitted Acoustic Intensity from Silicon Integrated Piezoelectric Ultrasound Transducerscitations
- 2021Highly-conformal sputtered through-silicon vias with sharp superconducting transitioncitations
- 2021Highly-conformal sputtered through-silicon vias with sharp superconducting transitioncitations
- 2020Controlling the pinning time of a receding contact line under forced wetting conditionscitations
- 2020Fabrication of Al-based superconducting high-aspect ratio TSVs for quantum 3D integrationcitations
- 2020Fabrication of Al-based superconducting high-aspect ratio TSVs for quantum 3D integrationcitations
- 2020FET-based integrated charge sensor for organ-on-chip applicationscitations
- 2019Controlling the pinning of a receding contact line in a flow coating process
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article
Highly-conformal sputtered through-silicon vias with sharp superconducting transition
Abstract
<p>This paper describes the microfabrication and electrical characterization of aluminum-coated superconducting through-silicon vias (TSVs) with sharp superconducting transition above 1 K. The sharp superconducting transition was achieved by means of fully conformal and void-free DC-sputtering of the TSVs with Al, and is here demonstrated in up to 500μ m-deep vias. Full conformality of Al sputtering was made possible by shaping the vias with a tailored hourglass profile, which allowed a metallic layer as thick as 430 nm to be deposited in the center of the vias. Single-via electric resistance as low as 160 mΩ at room temperature and superconductivity at 1.27 K were measured by a three-dimensional (3D) cross-bridge Kelvin resistor structure. This work establishes a CMOS-compatible fabrication process suitable for arrays of superconducting TSVs and 3D integration of superconducting silicon-based devices. [2020-0354].</p>