Materials Map

Discover the materials research landscape. Find experts, partners, networks.

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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in Cooperation with on an Cooperation-Score of 37%

Topics

Publications (1/1 displayed)

  • 2012200-mm CVD grown Si/SiGe resonant interband tunnel diodes optimized for high peak-to-valley current ratioscitations

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Chart of shared publication
Loo, Roger
1 / 17 shared
Vandervorst, Wilfried
1 / 17 shared
Berger, Paul R.
1 / 16 shared
Douhard, Bastien
1 / 4 shared
Chart of publication period
2012

Co-Authors (by relevance)

  • Loo, Roger
  • Vandervorst, Wilfried
  • Berger, Paul R.
  • Douhard, Bastien
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document

200-mm CVD grown Si/SiGe resonant interband tunnel diodes optimized for high peak-to-valley current ratios

  • Loo, Roger
  • Vandervorst, Wilfried
  • Ramesh, Anisha
  • Berger, Paul R.
  • Douhard, Bastien
Abstract

<p>Negative differential resistance (NDR) devices in conjunction with MOS transistors provide a high speed, low power alternate to complementary metal oxide semiconductor (CMOS) technology. Boolean logic with gate-level pipelining has been demonstrated using monostable-bistable logic (MOBILE) gates. Application to low-power embedded memory is also promising. A key hurdle for tunneling based devices is development of a manufacturable process that can be integrated into a CMOS process line. Monolithic integration of low- temperature molecular beam epitaxy (LT-MBE) grown Si/SiGe resonant interband tunnel diodes (RITD) with NMOS has been demonstrated. However, chemical vapor deposition (CVD) is the dominant epitaxial growth technique for semiconductor manufacturing. The first CVD grown Si/SiGe RITD was demonstrated with a peak-to-valley current ratio (PVCR) of 1.85. In this work, further optimization of boron -doping has resulted in high PVCR up to 5.2. Current density dependence on tunneling barrier thickness is also investigated.</p>

Topics
  • density
  • impedance spectroscopy
  • semiconductor
  • Boron
  • current density
  • chemical vapor deposition