Materials Map

Discover the materials research landscape. Find experts, partners, networks.

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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Materials Map under construction

The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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in Cooperation with on an Cooperation-Score of 37%

Topics

Publications (1/1 displayed)

  • 2023Influence of Annealing on Microstructure of Electroplated Copper Trenches in Back-End-Of-Line1citations

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Chart of shared publication
Hecker, Michael
1 / 2 shared
Meier, Karsten
1 / 17 shared
Muller, Maik
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Machani, Kashi Vishwanath
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Kuechenmeister, Frank
1 / 4 shared
Singh, Prashant Kumar
1 / 3 shared
Bock, Karlheinz
1 / 43 shared
Wieland, Marcel
1 / 4 shared
Chart of publication period
2023

Co-Authors (by relevance)

  • Hecker, Michael
  • Meier, Karsten
  • Muller, Maik
  • Machani, Kashi Vishwanath
  • Kuechenmeister, Frank
  • Singh, Prashant Kumar
  • Bock, Karlheinz
  • Wieland, Marcel
OrganizationsLocationPeople

document

Influence of Annealing on Microstructure of Electroplated Copper Trenches in Back-End-Of-Line

  • Hecker, Michael
  • Meier, Karsten
  • Muller, Maik
  • Machani, Kashi Vishwanath
  • Kuechenmeister, Frank
  • Breuer, Dirk
  • Singh, Prashant Kumar
  • Bock, Karlheinz
  • Wieland, Marcel
Abstract

<p>Copper is widely used as an interconnect material in Back-End-of-Line (BEOL) because it has high thermal conductivity and good electromigration failure resistance. However, RF applications require a larger number of ultra-thick copper metals combined with a high metal density. Due to high CTE mismatch of the copper interconnects to silicon a high wafer bow is induced during the BEOL process steps. A main contribution for the high wafer bow is the stress induced in the wafer due to annealing process steps at elevated temperature. The current study focuses on the effect of line width and annealing temperatures on stress relaxation and microstructural evolution due to aging for one month. In addition, the effect of microstructural change is studied with the time dependent wafer bow measurement showing stress relaxation over time.</p>

Topics
  • density
  • impedance spectroscopy
  • microstructure
  • copper
  • Silicon
  • aging
  • annealing
  • thermal conductivity
  • aging