| People | Locations | Statistics |
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| Naji, M. |
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| Motta, Antonella |
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| Aletan, Dirar |
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| Mohamed, Tarek |
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| Ertürk, Emre |
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| Taccardi, Nicola |
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| Kononenko, Denys |
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| Petrov, R. H. | Madrid |
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| Alshaaer, Mazen | Brussels |
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| Bih, L. |
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| Casati, R. |
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| Muller, Hermance |
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| Kočí, Jan | Prague |
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| Šuljagić, Marija |
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| Kalteremidou, Kalliopi-Artemi | Brussels |
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| Azam, Siraj |
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| Ospanova, Alyiya |
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| Blanpain, Bart |
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| Ali, M. A. |
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| Popa, V. |
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| Rančić, M. |
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| Ollier, Nadège |
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| Azevedo, Nuno Monteiro |
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| Landes, Michael |
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| Rignanese, Gian-Marco |
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Bock, Karlheinz
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (43/43 displayed)
- 2024Creep characterization of lead-free solder alloys over an extended temperature range used for fatigue modeling
- 2024Integration of Multi-Lithography Technologies for the Fabrication of Flexible Optical Linkcitations
- 2023Feasibility Investigation of Machine Learning for Electronic Reliability Analysis using FEAcitations
- 2023Electro-optical co-integration platform for high-density hybrid systems - SILHOUETTE
- 2023Integration of Multi-Lithography Technologies for the Fabrication of Flexible Optical Linkcitations
- 2023Influence of Annealing on Microstructure of Electroplated Copper Trenches in Back-End-Of-Linecitations
- 2023Temperature-dependent Creep Characterization of Lead-free Solder Alloys Using Nanoindentation for Finite Element Modelingcitations
- 2023Improving the Vibration Reliability of SAC Flip-Chip Interconnects Using Underfillcitations
- 2023Characterization of Embedded and Thinned RF Chipscitations
- 2023Wafer Level Chip Scale Package Failure Mode Prediction using Finite Element Modelingcitations
- 2023Feasibility and Optimisation of Cu-Sintering under Nitrogen Atmospherecitations
- 2022Characterization of material adhesion in redistribution multilayer for embedded high-frequency packagescitations
- 2022Embedding of Thinned RF Chips and Electrical Redistribution Layer Characterizationcitations
- 2022Process Developments on Sheet Molding and Redistribution Deposition for Cu-Pillar Chipscitations
- 2022Development of a Ultra-Thin Glass Based Pressure Sensor for High-Temperature Application
- 2020Stereolithographic printed polymers on ceramic for 3D-opto-MIDcitations
- 2020Influence of flexibility of the interconnects on the dynamic bending reliability of flexible hybrid electronicscitations
- 2019Combination of Thick-Film Hybrid Technology and Polymer Additive Manufacturing for High-Performance Mechatronic Integrated Devicescitations
- 2019Analysis of flip-chip solder joints under isothermal vibration loadingcitations
- 2018Interconnect Technology Development for 180GHz Wireless mm-Wave System-in-Foil Transceiverscitations
- 2018The future of short-range high-speed data transmissioncitations
- 2018Will 3D-semiadditive packaging with high conductive redistribution layer and process temperatures below 100°C enable new electronic applications?citations
- 2018Roll-to-roll processing of film substrates for hybrid integrated flexible electronicscitations
- 2018Wire Bonding of Surface Acoustic Wave (SAW) Sensors for High Temperature Applicationscitations
- 2018Evaluation of Nanoparticle Inks on Flexible and Stretchable Substrates for Biocompatible Applicationcitations
- 2017Fatigue measurement setup under combined thermal and vibration loading on electronic SMT assemblycitations
- 2016A novel test method for robustness assessment of very small, functional ultra-thin chips embedded in flexible foils
- 2016Screen printed conductive pastes for biomedical electronicscitations
- 2015Finite element analysis of uniaxial bending of ultra-thin silicon dies embedded in flexible foil substratescitations
- 2015Reliability study on SMD components on an organic substrate with a thick copper core for power electronics applicationscitations
- 2014Investigations of the fracture strength of thin silicon dies embedded in flexible foil substratescitations
- 2014Air-stable, high current density, solution-processable, amorphous organic rectifying diodes (ORDs) for low-cost fabrication of flexible passive low frequency RFID tagscitations
- 2013"Sensor-filter" - intelligent micro filter system in foil technology
- 2013Genotyping of single nucleotide polymorphisms by melting curve analysis using thin film semi-transparent heaters integrated in a lab-on-foil systemcitations
- 2013Foil-based DNA melting curve analysis platform for low-cost point-of-care molecular diagnostics
- 2012"Sensor-filter" - intelligent micro filter system in foil technology
- 2012DNA melting curve analysis on semi-transparent thin film microheater on flexible lab-on-foil substrate
- 2011Ultra-thin wafer fabrication through dicing-by-thinningcitations
- 2011Influence of wafer grinding and etching techniques on the fracture strength of thin silicon substratescitations
- 2010Rapid prototyping of electronic modules combining aerosol printing and ink jet printingcitations
- 2010Electrical stress on film resistive structures on flexible substratescitations
- 2009Properties of conductive microstructures containing nano sized silver particlescitations
- 2008Selective one-step plasma patterning process for fluidic self-assembly of silicon chipscitations
Places of action
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document
Interconnect Technology Development for 180GHz Wireless mm-Wave System-in-Foil Transceivers
Abstract
In this work, a polyimide (PI) foil-based wireless transceiver, which can be placed on the top of each node chip stack, is proposed. The transceivers with Butler matrix (BM) steered antenna arrays enable directed links from each node on one PCB towards any other node on the neighboring board in the rack. These passive components can be integrated into the foil whereas the active components (mm-wave ICs - MMICs) fabricated in SiGe-technology have to be connected with low parasitic, matched (wave impedance) interconnects. First the development of fabrication of low-loss transmission line structures on PI-foils will be described. The technology is based on foils with 50μm PI-thickness with Cr/Cu seed metallization and galvanic thickened Au layer. This allows for precise definition of coplanar transmission lines with low roughness (RMS roughness of 20-530nm). The measurements of characteristic parameters show good agreement with simulated data - the deviation of parasitic components (L and C) is below than 10%. A transmission loss of about 0.5 dB/cm at 60 GHz and about 1 dB/cm at 200 GHz has been measured. These substrates have been used for flip-chip assembly of chip components in order to characterize the performance of FC-interconnect at frequencies up to 220 GHz. For this analysis test-chips with transmission lines fabricated in a 130 nm SiGe-BiCMOS technology have been used. In order to mount these chips with Al pad finish on the PI-foil substrates Au studbumps with reduced size (50μm diameter on foot and 30μm height) and thermosonic flip-chip bonding have been used. From the measurements of FC bonded test chips with μ-strip lines on the PI-foils a FC-interconnect loss of about 0.28 ± 0.05 dB per bump at 60 GHz and of about 0.73 ± 0.14 dB per bump at 200 GHz could be derived.