Materials Map

Discover the materials research landscape. Find experts, partners, networks.

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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Taube, Andrzej

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in Cooperation with on an Cooperation-Score of 37%

Topics

Publications (4/4 displayed)

  • 2023Carrier Trap Density Reduction at SiO2/4H-Silicon Carbide Interface with Annealing Processes in Phosphoryl Chloride and Nitride Oxide Atmospheres7citations
  • 2020Development of Assembly Techniques for Connection of AlGaN/GaN/Si Chips to DBC substrate6citations
  • 2019Structural and electrical studies on Ti/Al-based Au-free ohmic contact metallization for AlGaN/GaN HEMTs9citations
  • 2018Influence of Atomic Layer Deposition Temperature on the Electrical Properties of Al/ZrO2/SiO2/4H‐SiC Metal‐Oxide Semiconductor Structures11citations

Places of action

Chart of shared publication
Brzozowski, Ernest
1 / 1 shared
Guziewicz, Marek
3 / 10 shared
Król, Krystian
1 / 1 shared
Kaminski, Maciej
1 / 2 shared
Sadowski, Oskar Artur
1 / 1 shared
Kamiński, Maciej
1 / 1 shared
Kisiel, Ryszard
1 / 20 shared
Sochacki, Mariusz
2 / 9 shared
Gołaszewska, Krystyna
1 / 1 shared
Zdunek, Joanna
1 / 34 shared
Bazarnik, Piotr
1 / 49 shared
Ekielski, Marek
1 / 2 shared
Szerling, Anna
1 / 2 shared
Adamczyk-Cieślak, Bogusława
1 / 77 shared
Gierałtowska, Sylwia
1 / 3 shared
Kwietniewski, Norbert
1 / 15 shared
Wachnicki, Łukasz
1 / 4 shared
Godlewski, Marek
1 / 3 shared
Szmidt, Jan
1 / 16 shared
Król, Krystian Bogumił
1 / 6 shared
Chart of publication period
2023
2020
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2018

Co-Authors (by relevance)

  • Brzozowski, Ernest
  • Guziewicz, Marek
  • Król, Krystian
  • Kaminski, Maciej
  • Sadowski, Oskar Artur
  • Kamiński, Maciej
  • Kisiel, Ryszard
  • Sochacki, Mariusz
  • Gołaszewska, Krystyna
  • Zdunek, Joanna
  • Bazarnik, Piotr
  • Ekielski, Marek
  • Szerling, Anna
  • Adamczyk-Cieślak, Bogusława
  • Gierałtowska, Sylwia
  • Kwietniewski, Norbert
  • Wachnicki, Łukasz
  • Godlewski, Marek
  • Szmidt, Jan
  • Król, Krystian Bogumił
OrganizationsLocationPeople

article

Development of Assembly Techniques for Connection of AlGaN/GaN/Si Chips to DBC substrate

  • Guziewicz, Marek
  • Taube, Andrzej
  • Kamiński, Maciej
  • Kisiel, Ryszard
  • Sochacki, Mariusz
Abstract

PurposeThis paper aims to investigate the sintering and solid liquid interdiffusion bonding (SLID) techniques to attach AlGaN/GaN-on-Si chips to direct bond copper (DBC) substrate. The influence of metal layers deposited on the backside of AlGaN/GaN-on-Si dies on the assembly process is also investigated.Design/methodology/approachThe authors assumed the value of the shear strength to be a basic parameter for evaluation of mechanical properties. Additionally, the surface condition after shearing was assessed by SEM photographs and the shear surface was studied by X-ray diffraction method. The SLID requires Sn-plated DBC substrate and can be carried out at temperature slightly higher than 250°C and pressure reduced to 4 MPa, while the sintering requires process temperature of 350°C and the pressure at least 7.5 MPa.FindingsAg-, Au-backside covered high electron mobility transistor (HEMT) chips can be assembled on Sn-plated DBC substrates by SLID technology. In case of sintering technology, Cu- or Ag-backside covered HEMT chips can be assembled on Ag- or Ni/Au-plated DBC substrates. The SLID process can be realized at lower temperature and decreased pressure than sintering process.Research limitations/implicationsFor SLID technology, the adhesion between Cu-backside covered HEMT die and DBC with Sn layer loses its operational properties after short-term ageing in air at temperature of 300°C.Originality/valueIn the SLID process, Sn-Cu and Sn-Ag intermetallic compounds and alloys are responsible for creation of the joint between Sn-plated DBC and micropowder Ag layer, while the sintered joint between the chip and Ag-based micropowder is formed in diffusion process.

Topics
  • impedance spectroscopy
  • surface
  • compound
  • mobility
  • scanning electron microscopy
  • x-ray diffraction
  • strength
  • copper
  • aging
  • intermetallic
  • sintering
  • interdiffusion
  • diffraction method