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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Vavasour, Oliver J.
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (4/4 displayed)
- 2022The improved reliability performance of post-deposition annealed ALD-SiO2
- 2022Engineering the Schottky interface of 3.3 kV SiC JBS diodes using a P2O5 surface passivation treatmentcitations
- 2020The improvement of Mo/4H-SiC Schottky diodes via a P2O5 surface passivation treatmentcitations
- 2019Effect of HCl cleaning on InSb–Al<sub>2</sub>O<sub>3</sub> MOS capacitorscitations
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article
Effect of HCl cleaning on InSb–Al<sub>2</sub>O<sub>3</sub> MOS capacitors
Abstract
<jats:title>Abstract</jats:title><jats:p>In this work, the role of HCl treatments on InSb surfaces and InSb–Al<jats:sub>2</jats:sub>O<jats:sub>3</jats:sub> dielectric interfaces is characterised. X-ray photoelectron spectroscopy measurements indicate that HCl diluted in and rinsed with isopropanol (IPA) results in a surface layer of InCl<jats:sub>3</jats:sub> which is not present for similar HCl-water processes. Furthermore, this InCl<jats:sub>3</jats:sub> layer desorbs from the surface between 200 °C and 250 °C. Metal–oxide–semiconductor capacitors were fabricated using atomic layer deposition of Al<jats:sub>2</jats:sub>O<jats:sub>3</jats:sub> at 200 °C and 250 °C and the presence of InCl<jats:sub>3</jats:sub> was associated with a +0.79 V flatband voltage shift. The desorption of the InCl<jats:sub>3</jats:sub> layer at 250 °C reversed this shift but the increased process temperature resulted in increased interface-trapped charge (<jats:italic>D</jats:italic><jats:sub>it</jats:sub>) and hysteresis voltage (<jats:italic>V</jats:italic><jats:italic><jats:sub>H</jats:sub></jats:italic>). This shift in flatband voltage, which does not affect other figures of merit, offers a promising route to manipulate the threshold voltage of MOS transistors, allowing enhancement-mode and depletion-mode devices to be fabricated in parallel.</jats:p>