• Cheong, J. S.
• Zaidi, Zaffar Haider
• Jiang, S.
• Humphreys, Colin
• Lee, K. B.
• Li, P.
• Chalker, Paul
• Qian, H.
• Guiney, I.
• Roberts, Joseph
• Houston, P. A.
• Wallis, D. J.

Abstract

In a bid to understand the commonly observed hysteresis in the threshold voltage (VTH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium VTH, forward bias related VTH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations.

Topics

• Deposition
• surface
• mobility
• semiconductor