| People | Locations | Statistics |
|---|---|---|
| Naji, M. |
| |
| Motta, Antonella |
| |
| Aletan, Dirar |
| |
| Mohamed, Tarek |
| |
| Ertürk, Emre |
| |
| Taccardi, Nicola |
| |
| Kononenko, Denys |
| |
| Petrov, R. H. | Madrid |
|
| Alshaaer, Mazen | Brussels |
|
| Bih, L. |
| |
| Casati, R. |
| |
| Muller, Hermance |
| |
| Kočí, Jan | Prague |
|
| Šuljagić, Marija |
| |
| Kalteremidou, Kalliopi-Artemi | Brussels |
|
| Azam, Siraj |
| |
| Ospanova, Alyiya |
| |
| Blanpain, Bart |
| |
| Ali, M. A. |
| |
| Popa, V. |
| |
| Rančić, M. |
| |
| Ollier, Nadège |
| |
| Azevedo, Nuno Monteiro |
| |
| Landes, Michael |
| |
| Rignanese, Gian-Marco |
|
Ghibaudo, Gerard
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (3/3 displayed)
- 2019Impact of CMOS TiN metal gate process on microstructure and its correlation with electrical properties
- 2017Self-heating assessment and cold current extraction in FDSOI MOSFETscitations
- 2016Interface trap density evaluation on bare silicon-on-insulator wafers using the quasi-static capacitance techniquecitations
Places of action
| Organizations | Location | People |
|---|
article
Interface trap density evaluation on bare silicon-on-insulator wafers using the quasi-static capacitance technique
Abstract
© 2016 Author(s). This paper presents a detailed investigation of the quasi-static capacitance-voltage (QSCV) technique in pseudo-metal-oxide-semiconductor field effect transistor (pseudo-MOSFET) configuration for evaluating the interface quality of bare silicon-on-insulator (SOI) wafers, without processing dedicated metal-oxide-semiconductor (MOS) test devices. A physical model is developed that is capable of explaining the experimental results. In addition, frequency effects are used to validate the equations by a systematic comparison between experimental and calculated characteristics, as well as by a direct comparison with the standard high-low frequency approach. An extraction procedure for interface trap density based solely on QSCV experimental results is proposed, and limits of the procedure are discussed. The proposed experimental and analytical procedure is demonstrated by characterizing SOI structures with different geometries and with different qualities of surface passivation of the top silicon film.