Materials Map

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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in Cooperation with on an Cooperation-Score of 37%

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Publications (1/1 displayed)

  • 2016ZrO2 and HfO2 dielectrics on (001) n-InAs with atomic-layer-deposited in situ surface treatment14citations

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Lind, Erik
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Wernersson, Lars Erik
1 / 7 shared
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2016

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  • Lind, Erik
  • Wernersson, Lars Erik
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article

ZrO2 and HfO2 dielectrics on (001) n-InAs with atomic-layer-deposited in situ surface treatment

  • Babadi, Aein Shiri
  • Lind, Erik
  • Wernersson, Lars Erik
Abstract

<p>The electrical properties of ZrO<sub>2</sub> and HfO<sub>2</sub> gate dielectrics on n-InAs were evaluated. Particularly, an in situ surface treatment method including cyclic nitrogen plasma and trimethylaluminum pulses was used to improve the quality of the high-κ oxides. The quality of the InAs-oxide interface was evaluated with a full equivalent circuit model developed for narrow band gap metal-oxide-semiconductor (MOS) capacitors. Capacitance-voltage (C-V) measurements exhibit a total trap density profile with a minimum of 1 × 10<sup>12</sup> cm<sup>-2</sup> eV<sup>-1</sup> and 4 × 10<sup>12</sup> cm<sup>-2</sup> eV<sup>-1</sup> for ZrO<sub>2</sub> and HfO<sub>2</sub>, respectively, both of which are comparable to the best values reported for high-κ/III-V devices. Our simulations showed that the measured capacitance is to a large extent affected by the border trap response suggesting a very low density of interface traps. Charge trapping in MOS structures was also investigated using the hysteresis in the C-V measurements. The experimental results demonstrated that the magnitude of the hysteresis increases with increase in accumulation voltage, indicating an increase in the charge trapping response.</p>

Topics
  • density
  • impedance spectroscopy
  • surface
  • simulation
  • semiconductor
  • Nitrogen