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| Naji, M. |
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| Motta, Antonella |
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| Aletan, Dirar |
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| Mohamed, Tarek |
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| Ertürk, Emre |
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| Taccardi, Nicola |
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| Kononenko, Denys |
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| Petrov, R. H. | Madrid |
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| Alshaaer, Mazen | Brussels |
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| Bih, L. |
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| Casati, R. |
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| Muller, Hermance |
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| Kočí, Jan | Prague |
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| Šuljagić, Marija |
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| Kalteremidou, Kalliopi-Artemi | Brussels |
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| Azam, Siraj |
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| Ospanova, Alyiya |
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| Blanpain, Bart |
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| Ali, M. A. |
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| Popa, V. |
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| Rančić, M. |
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| Ollier, Nadège |
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| Azevedo, Nuno Monteiro |
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| Landes, Michael |
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| Rignanese, Gian-Marco |
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Mantl, S.
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (18/18 displayed)
- 2016Si–Ge–Sn alloys: From growth to applicationscitations
- 2016Low Temperature Deposition of High-k/Metal Gate Stacks on High-Sn Content (Si)GeSn-Alloyscitations
- 2015Ternary and quaternary Ni(Si)Ge(Sn) contact formation for highly strained Ge p- and n-MOSFETscitations
- 2015Optical Transitions in Direct-Bandgap Ge1-xSnx Alloyscitations
- 2015Optical Transitions in Direct-Bandgap Ge 1– x Sn x Alloyscitations
- 2014SiGeSn growth studies using reduced pressure chemical vapor deposition towards optoelectronic applicationscitations
- 2013Millisecond flash lamp annealing for LaLuO3 and LaScO 3 high-k dielectricscitations
- 2013Photoemission Spectroscopy Study of the Lanthanum Lutetium Oxide / Silicon interfacecitations
- 2011Atomic layer deposition of HfO2 and Al2O3 layers on 300 mm Si wafers for gate stack technologycitations
- 2011Silicon Nanowire Tunneling Field-Effect Transistor Arrays: Improving Subthreshold Performance Using Excimer Laser Annealingcitations
- 2009Si ion implantation for strain relaxation of pseudomorphic Si1-xGex/Si(100) heterostructurescitations
- 2007Characterization and electrical properties of high-k GdScO3 thin films grown by atomic layer depositioncitations
- 2007Effects of annealing on the electrical and interfacial properties of amorphous lanthanum scandate films prepared by molecular beam depositioncitations
- 2006Preparation and characterization of rare earth scandates as alternative gate oxide materialscitations
- 2004Nanopatterning of epitaxial CoSi2 using oxidation in a local stress field and fabrication of nanometer metal-oxide-semiconductor field-effect transistorscitations
- 2003Fabrication of Schottky barrier MOSFETs using self-assembly CoSi 2 nanopatterning and spacer gate technologiescitations
- 2002Epitaxial CoSi2-nanostructures : an approach to silicon nanoelectronicscitations
- 2002Epitaxial CoSi2-nanostructurescitations
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article
Nanopatterning of epitaxial CoSi2 using oxidation in a local stress field and fabrication of nanometer metal-oxide-semiconductor field-effect transistors
Abstract
<p>A patterning method for the generation of epitaxial CoSi<sub>2</sub> nanostructures was developed based on anisotropic diffusion of Co/Si atoms in a stress field during rapid thermal oxidation (RTO). The stress field is generated along the edge of a mask consisting of a thin SiO<sub>2</sub> layer and a Si<sub>3</sub>N<sub>4</sub> layer. During RTO of the masked suicide structure, a well-defined separation of the suicide layer forms along the edge of the mask. The technique was used to make 50-nm channel-length metal-oxide-semiconductor field-effect transistors (MOSFETs). These highly uniform gaps define the channel region of the fabricated device. Two types of MOSFETs have been fabricated: symmetric transistor structures, using the separated suicide layers as Schottky source and drain, and asymmetric transistors, with n<sup>+</sup> source and Schottky drain. The asymmetric transistors were fabricated by an ion implantation into the unprotected CoSi<sub>2</sub> layer and a subsequent out diffusion to form the n<sup>+</sup> source. The detailed fabrication process as well as the I- V characteristics of both the symmetric and asymmetric transistor structures will be presented.</p>