People | Locations | Statistics |
---|---|---|
Naji, M. |
| |
Motta, Antonella |
| |
Aletan, Dirar |
| |
Mohamed, Tarek |
| |
Ertürk, Emre |
| |
Taccardi, Nicola |
| |
Kononenko, Denys |
| |
Petrov, R. H. | Madrid |
|
Alshaaer, Mazen | Brussels |
|
Bih, L. |
| |
Casati, R. |
| |
Muller, Hermance |
| |
Kočí, Jan | Prague |
|
Šuljagić, Marija |
| |
Kalteremidou, Kalliopi-Artemi | Brussels |
|
Azam, Siraj |
| |
Ospanova, Alyiya |
| |
Blanpain, Bart |
| |
Ali, M. A. |
| |
Popa, V. |
| |
Rančić, M. |
| |
Ollier, Nadège |
| |
Azevedo, Nuno Monteiro |
| |
Landes, Michael |
| |
Rignanese, Gian-Marco |
|
Todri-Sanial, Aida
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (14/14 displayed)
- 2023Non-volatile resistive switching mechanism in single-layer MoS2 memristorscitations
- 2023Non-volatile resistive switching mechanism in single-layer MoS2 memristors:insights from ab initio modelling of Au and MoS2 interfacescitations
- 2023Roadmap for Unconventional Computing with Nanotechnology
- 2022First-Principles Simulations of Vacancies and Grain Boundaries in Monolayer MoS2-Au Interfaces for Unconventional Computing Paradigm
- 2020Stretchable Strain Sensors for Human Movement Monitoringcitations
- 2019Investigation of Pt-Salt-Doped-Standalone-Multiwall Carbon Nanotubes for On-Chip Interconnect Applicationscitations
- 2019Investigation of Pt-Salt-Doped-Standalone- Multiwall Carbon Nanotubes for On-Chip Interconnect Applicationscitations
- 2019Microelectronics Department Half-Day Seminar
- 2018Atomistic- to Circuit-Level Modeling of Doped SWCNT for On-Chip Interconnectscitations
- 2017Design methodology for 3D power delivery networks
- 2015Design Methodology for 3D Power Delivery Networks
- 2014Globally Constrained Locally Optimized 3-D Power Delivery Networkscitations
- 2014Design Space Exploration Of Emerging Technologies For Energy Efficiency
- 2014Habilitation - Design Space Exploration Of Emerging Technologies For Energy Efficiency
Places of action
Organizations | Location | People |
---|
article
Non-volatile resistive switching mechanism in single-layer MoS2 memristors
Abstract
<p>Non-volatile memristive devices based on two-dimensional (2D) layered materials provide an attractive alternative to conventional flash memory chips. Single-layer semiconductors, such as monolayer molybdenum disulphide (ML-MoS2), enable the aggressive downscaling of devices towards greater system integration density. The "atomristor", the most compact device to date, has been shown to undergo a resistive switching between its high-resistance (HRS) and low-resistance (LRS) states of several orders of magnitude. The main hypothesis behind its working mechanism relies on the migration of sulphur vacancies in the proximity of the metal contact during device operation, thus inducing the variation of the Schottky barrier at the metal-semiconductor interface. However, the interface physics is not yet fully understood: other hypotheses were proposed, involving the migration of metal atoms from the electrode. In this work, we aim to elucidate the mechanism of the resistive switching in the atomristor. We carry out density functional theory (DFT) simulations on model Au and ML-MoS2 interfaces with and without the presence of point defects, either vacancies or substitutions. To construct realistic interfaces, we combine DFT with Green's function surface simulations. Our findings reveal that it is not the mere presence of S vacancies but rather the migration of Au atoms from the electrode to MoS2 that modulate the interface barrier. Indeed, Au atoms act as conductive "bridges", thus facilitating the flow of charge between the two materials.</p>