Materials Map

Discover the materials research landscape. Find experts, partners, networks.

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The Materials Map is an open tool for improving networking and interdisciplinary exchange within materials research. It enables cross-database search for cooperation and network partners and discovering of the research landscape.

The dashboard provides detailed information about the selected scientist, e.g. publications. The dashboard can be filtered and shows the relationship to co-authors in different diagrams. In addition, a link is provided to find contact information.

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The Materials Map is still under development. In its current state, it is only based on one single data source and, thus, incomplete and contains duplicates. We are working on incorporating new open data sources like ORCID to improve the quality and the timeliness of our data. We will update Materials Map as soon as possible and kindly ask for your patience.

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in Cooperation with on an Cooperation-Score of 37%

Topics

Publications (1/1 displayed)

  • 2013Modelling methodology for thermal analysis of hot solder dip process14citations

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Chart of shared publication
Tollafield, Peter
1 / 2 shared
Best, Chris
1 / 4 shared
Alam, M. O.
1 / 3 shared
Scott, Jim
1 / 1 shared
Parker, Mike
1 / 1 shared
Yin, Chunyan
1 / 3 shared
Stoyanov, Stoyan
1 / 7 shared
Chart of publication period
2013

Co-Authors (by relevance)

  • Tollafield, Peter
  • Best, Chris
  • Alam, M. O.
  • Scott, Jim
  • Parker, Mike
  • Yin, Chunyan
  • Stoyanov, Stoyan
OrganizationsLocationPeople

article

Modelling methodology for thermal analysis of hot solder dip process

  • Tollafield, Peter
  • Best, Chris
  • Crawford, Rob
  • Alam, M. O.
  • Scott, Jim
  • Parker, Mike
  • Yin, Chunyan
  • Stoyanov, Stoyan
Abstract

The shift of electronics industry towards the use of lead-free solders in components manufacturing brought also the challenge of addressing the problem of tin whiskers. Manufacturers of high reliability and safety critical equipment in sectors such as defence and aerospace rely increasingly on the use of commercial-of-the-shelf (COTS) electronic components for their products and systems. The use of COTS components with lead-free solder plated terminations comes with the risks for their long term reliability associated with tin whisker growth related failures. In the case of leaded type electronic components such as Quad Flat Package (QFP) and Small Outline Package (SOP), one of the promising solutions to this problem is to “re-finish” the package terminations by replacing the lead-free solder coatings on the leads with conventional tin–lead solder. This involves subjecting the electronic components to a post-manufacturing process known as Hot Solder Dip (HSD). One of the main concerns for adopting HSD (refinishing) as a strategy to the tin whisker problem is the potential risk for thermally induced damage in the components when subjected to this process.This paper details a thermal modelling driven approach to the characterisation of the impact of hot solder dipping on electronic components. Main focus is on the evaluation of the re-finishing process effects on parts’ temperature gradients and heating/cooling rates, and on the advantages of applying an efficient model based process optimisation. Transient thermal finite element analysis is used to evaluate the temperature distribution in Quad Flat Package (QFP) variants during a double-dip hot solder dipping process developed by Micross Components Ltd. Full detailed three-dimensional (3D) models of the components are developed using comprehensive characterisation of the respective package structures and materials based on X-ray, SEM-EDX, cross-sectional metallurgy and 3D CT scan. The thermal modelling approach is validated using thermocouple measurement data for one of the studied parts and by comparing with model temperature predictions. Model results have informed the process optimisation strategy, and through experimentation key process parameters are alerted to provide optimal thermal characteristics. The optimised process settings result in temperature ramp rates at die level within recommended manufacture’s limit. A demonstration and discussion on the influence of the package internal structure and design on the thermal response to HSD is also provided.

Topics
  • impedance spectroscopy
  • scanning electron microscopy
  • thermal analysis
  • Energy-dispersive X-ray spectroscopy
  • tin
  • finite element analysis
  • computed tomography scan