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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Flandre, Denis
Université Catholique de Louvain
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (18/18 displayed)
- 2024Liâ€Doping and Agâ€Alloying Interplay Shows the Pathway for Kesterite Solar Cells with Efficiency Over 14%citations
- 2024Li-doping and Ag-alloying interplay shows the pathway for kesterite solar cells with efficiency over 14%citations
- 2024Li-doping and Ag-alloying interplay shows the pathway for kesterite solar cells with efficiency over 14%citations
- 2023Ge-alloyed kesterite thin-film solar cells: previous investigations and current status – a comprehensive reviewcitations
- 2022Characterization of thin Al2O3/SiO2 dielectric stack for CMOS transistorscitations
- 2021Comparative study of Al2O3 and HfO2 for surface passivation of Cu(In,Ga)Se2 thin-films: An innovative Al2O3/HfO2 multi-stack designcitations
- 2021Perovskite Metal–Oxide–Semiconductor Structures for Interface Characterizationcitations
- 2021Perovskite Metal–Oxide–Semiconductor Structures for Interface Characterizationcitations
- 2021High-Performance and Industrially Viable Nanostructured SiOx Layers for Interface Passivation in Thin Film Solar Cellscitations
- 2020Performances Evaluation of On-chip Large-Size Tapped Transformer for MEMS applicationscitations
- 2020Anisotropic conductive film & flip-chip bonding for low-cost sensor prototyping on rigid & flex PCBcitations
- 2019Light management design in ultra-thin chalcopyrite photovoltaic devices by employing optical modellingcitations
- 2017Optimisation of rear reflectance in ultra-thin CIGS solar cells towards>20% efficiencycitations
- 2017The Effect of Interfacial Charge on the Development of Wafer Bonded Silicon-on-Silicon-Carbide Power Devicescitations
- 2015Investigating the electronic properties of Al2O3/Cu(In, Ga)Se2 interfacecitations
- 2011Method for fabricating third generation photovoltaic cells based on Si quantum dots using ion implantation into SiO2citations
- 2011Neutron and gamma radiation effects on MEMS structures
- 2007Bulk and surface micromachined MEMS in thin film SOI technologycitations
Places of action
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article
Characterization of thin Al2O3/SiO2 dielectric stack for CMOS transistors
Abstract
This paper systematically investigates the electrical properties of thin Al2O3/SiO2 (with a target equivalent oxide thickness of 4.9 nm) as gate dielectric stack in the metal–oxide–semiconductor (MOS) capacitor. Different deposition techniques, i.e. thermal oxidation, thermal atomic layer deposition, and plasma-enhanced atomic layer deposition, are employed in the fabrication of MOS capacitors. The second derivative, Terman and conductance methods are used to extract the fixed oxide charges and interface trap densities in the MOS capacitors. Our results demonstrate that the Al2O3/SiO2 stack presents better performance in terms of negative fixed oxide charges and low interface trap density compared with the single-layer SiO2 with the similar equivalent oxide thickness about 3.9 nm. Furthermore, to evaluate the reliability of the Al2O3/SiO2 gate dielectric stack, the leakage current is analyzed. Contributions from Pool-Frenkel emission, trap-assisted tunneling, and Fowler-Nordheim mechanisms to the leakage current are detailed. Our results indicate that Al2O3/SiO2 gate dielectric stacks fabricated by plasma-enhanced atomic layer deposition Al2O3 and thermal SiO2 feature the lowest leakage current.