• Šatka, Alexander
• Hashizume, Tamotsu
• Chvála, Aleš
• Haščík, Štefan
• Hudec, Boris
• Stoklas, Roman
• Šichman, Peter
• Ťapajna, Milan
• Kuzmik, Jan
• Gregušová, Dagmar
• Hasenöhrl, Stanislav

Abstract

<jats:sec><jats:label /><jats:p>Herein, vertical GaN transistors with a semi‐insulating (SI) 1.3 μm thick channel layer and C doping of 1 × 10<jats:sup>17</jats:sup> cm<jats:sup>−3</jats:sup> are studied. Structures are grown using a metal–organic chemical vapor deposition on conductive GaN substrates. SI GaN is sandwiched between 2.5 μm thick n‐GaN drift layer (Si doping of ≈ 1 × 10<jats:sup>17</jats:sup> cm<jats:sup>−3</jats:sup>) and a top n‐GaN contact layer. A circular mesa region with a diameter of 180 μm is patterned using a deep dry etching. The gate contact formed on the mesa sidewall is insulated from the vertical channel using a 20 nm thick Al<jats:sub>2</jats:sub>O<jats:sub>3</jats:sub> grown by an atomic layer deposition. Despite a robust layout, transistors transfer characteristics indicate normally off behavior if extracted from the linearly scaled current–voltage characteristics and an open channel drain current of 30 mA at the gate bias of 4 V. Achieved on/off ratio is 10<jats:sup>7</jats:sup> at −2 V subthreshold gate bias when the full channel depletion is reached. And, 200 ns long gate pulse characteristics show only a marginal trapping even though no post‐metallization annealing is performed. By comparing experimental results with modeling, mobility of free electrons in the channel is found to be about 45 cm<jats:sup>2</jats:sup> V<jats:sup>−1</jats:sup> s<jats:sup>−1</jats:sup>.</jats:p></jats:sec>

Topics

• impedance spectroscopy
• mobility
• annealing
• size-exclusion chromatography
• chemical vapor deposition
• atomic layer deposition
• dry etching