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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Yoo, Won Jong
in Cooperation with on an Cooperation-Score of 37%
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Publications (4/4 displayed)
- 2024Parafilm Enabled Rapid and Scalable Delamination/Integration of Graphene for High‐Performance Capacitive Touch Sensorcitations
- 2022Observation of strange metal in hole-doped valley-spin insulator
- 2021Fermi‐Level Pinning Free High‐Performance 2D CMOS Inverter Fabricated with Van Der Waals Bottom Contactscitations
- 2021Chemical Dopant‐Free Doping by Annealing and Electron Beam Irradiation on 2D Materialscitations
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article
Fermi‐Level Pinning Free High‐Performance 2D CMOS Inverter Fabricated with Van Der Waals Bottom Contacts
Abstract
<jats:title>Abstract</jats:title><jats:p>Effective control of 2D transistors polarity is a critical challenge in the process for integrating 2D materials into semiconductor devices. Herein, a doping‐free approach for developing tungsten diselenide (WSe<jats:sub>2</jats:sub>) logic devices by utilizing the van der Waals (vdWs) bottom electrical contact with platinum and indium as the high and low work function metal respectively is reported. The device structure is free from chemical disorder and crystal defects arising from metal deposition, which enables a near ideal Fermi‐level de‐pinning. With effective controllability of device polarity through metal work function change, a complementary metal‐oxide‐semiconductor field effect transistor inverter with a gain of 198 at a bias voltage of 4.5 V is achieved. This study demonstrates an ultrahigh performance 2D inverter realized by controlling the device polarity from using Fermi‐level pinning‐free vdWs bottom contacts.</jats:p>