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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Flandre, Denis
Université Catholique de Louvain
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (18/18 displayed)
- 2024Liâ€Doping and Agâ€Alloying Interplay Shows the Pathway for Kesterite Solar Cells with Efficiency Over 14%citations
- 2024Li-doping and Ag-alloying interplay shows the pathway for kesterite solar cells with efficiency over 14%citations
- 2024Li-doping and Ag-alloying interplay shows the pathway for kesterite solar cells with efficiency over 14%citations
- 2023Ge-alloyed kesterite thin-film solar cells: previous investigations and current status – a comprehensive reviewcitations
- 2022Characterization of thin Al2O3/SiO2 dielectric stack for CMOS transistorscitations
- 2021Comparative study of Al2O3 and HfO2 for surface passivation of Cu(In,Ga)Se2 thin-films: An innovative Al2O3/HfO2 multi-stack designcitations
- 2021Perovskite Metal–Oxide–Semiconductor Structures for Interface Characterizationcitations
- 2021Perovskite Metal–Oxide–Semiconductor Structures for Interface Characterizationcitations
- 2021High-Performance and Industrially Viable Nanostructured SiOx Layers for Interface Passivation in Thin Film Solar Cellscitations
- 2020Performances Evaluation of On-chip Large-Size Tapped Transformer for MEMS applicationscitations
- 2020Anisotropic conductive film & flip-chip bonding for low-cost sensor prototyping on rigid & flex PCBcitations
- 2019Light management design in ultra-thin chalcopyrite photovoltaic devices by employing optical modellingcitations
- 2017Optimisation of rear reflectance in ultra-thin CIGS solar cells towards>20% efficiencycitations
- 2017The Effect of Interfacial Charge on the Development of Wafer Bonded Silicon-on-Silicon-Carbide Power Devicescitations
- 2015Investigating the electronic properties of Al2O3/Cu(In, Ga)Se2 interfacecitations
- 2011Method for fabricating third generation photovoltaic cells based on Si quantum dots using ion implantation into SiO2citations
- 2011Neutron and gamma radiation effects on MEMS structures
- 2007Bulk and surface micromachined MEMS in thin film SOI technologycitations
Places of action
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article
Perovskite Metal–Oxide–Semiconductor Structures for Interface Characterization
Abstract
<p>Perovskite solar cells (PSCs) are one of the most promising photovoltaic technologies. Amongst several challenges, developing and optimizing efficient electron transport layers that can be up-scaled still remains a massive task. Admittance measurements on metal–oxide–semiconductor (MOS) devices allow to better understand the optoelectronic properties of the interface between perovskite and the charge carrier transport layer. This work discloses a new pathway for a fundamental characterization of the oxide/semiconductor interface in PSCs. Inverted MOS structures, that is, glass/fluorine-doped tin oxide/tin oxide (SnO<sub>2</sub>)/perovskite are fabricated and characterized allowing to perform a comparative study on the optoelectronic characteristics of the interface between the perovskite and sputtered SnO<sub>2</sub>. Admittance measurements allow to assess the interface fixed oxide charges (Q<sub>f</sub>) and interface traps density (D<sub>it</sub>), which are extremely relevant parameters that define interface properties of extraction layers. It is concluded that a 30 nm thick SnO<sub>2</sub> layer without annealing presents an additional recombination mechanism compared to the other studied layers, and a 20 nm thick SnO<sub>2</sub> layer without annealing presents the highest positive Q<sub>f</sub> values. Thus, an effective method is shown for the characterization of the charge carrier transport layer/perovskite interface using the analysis performed on perovskite-based inverted MOS devices.</p>