People | Locations | Statistics |
---|---|---|
Naji, M. |
| |
Motta, Antonella |
| |
Aletan, Dirar |
| |
Mohamed, Tarek |
| |
Ertürk, Emre |
| |
Taccardi, Nicola |
| |
Kononenko, Denys |
| |
Petrov, R. H. | Madrid |
|
Alshaaer, Mazen | Brussels |
|
Bih, L. |
| |
Casati, R. |
| |
Muller, Hermance |
| |
Kočí, Jan | Prague |
|
Šuljagić, Marija |
| |
Kalteremidou, Kalliopi-Artemi | Brussels |
|
Azam, Siraj |
| |
Ospanova, Alyiya |
| |
Blanpain, Bart |
| |
Ali, M. A. |
| |
Popa, V. |
| |
Rančić, M. |
| |
Ollier, Nadège |
| |
Azevedo, Nuno Monteiro |
| |
Landes, Michael |
| |
Rignanese, Gian-Marco |
|
Sarkar, Debarghya
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (3/3 displayed)
- 2020Low Temperature Growth of Crystalline Semiconductors on Nonepitaxial Substratescitations
- 2020High mobility large area single crystal III–V thin film templates directly grown on amorphous SiO2 on siliconcitations
- 2017Bandgap Control via Structural and Chemical Tuning of Transition Metal Perovskite Chalcogenidescitations
Places of action
Organizations | Location | People |
---|
article
Low Temperature Growth of Crystalline Semiconductors on Nonepitaxial Substrates
Abstract
<jats:title>Abstract</jats:title><jats:p>In this work, a low temperature templated liquid phase (LT‐TLP) growth process is presented, that enables one to directly grow high optoelectronic quality single crystalline compound semiconductors (InP and InAs) on amorphous dielectrics at temperatures below 400 °C. Uniquely, the material quality is optimal when InP is grown at 300 °C, a temperature which is low enough to enable back‐end‐of‐line growth on fully fabricated Si complementary metal oxide semiconductor circuits. Using this low‐temperature grown InP, a transistor fabrication process is then entirely carried out at 300 °C or below, and an indium phosphide nanoribbon field effect transistor with excellent on/off ratios is demonstrated, indicating low defect density in the material. Overall, this approach enables growth of large area (tens of micron) single crystal compound semiconductor at low temperatures, establishing a back‐end‐of‐line (BEOL) compatible process for monolithic 3D device integration.</jats:p>