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Naji, M. |
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Motta, Antonella |
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Aletan, Dirar |
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Mohamed, Tarek |
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Ertürk, Emre |
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Taccardi, Nicola |
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Kononenko, Denys |
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Petrov, R. H. | Madrid |
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Alshaaer, Mazen | Brussels |
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Bih, L. |
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Casati, R. |
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Muller, Hermance |
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Kočí, Jan | Prague |
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Šuljagić, Marija |
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Kalteremidou, Kalliopi-Artemi | Brussels |
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Azam, Siraj |
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Ospanova, Alyiya |
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Blanpain, Bart |
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Ali, M. A. |
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Popa, V. |
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Rančić, M. |
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Ollier, Nadège |
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Azevedo, Nuno Monteiro |
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Landes, Michael |
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Rignanese, Gian-Marco |
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Chen, Xia
University of Southampton
in Cooperation with on an Cooperation-Score of 37%
Topics
Publications (11/11 displayed)
- 2020Silicon erasable waveguides and directional couplers by germanium ion implantation for configurable photonic circuitscitations
- 2018Germanium implanted photonic devices for post-fabrication trimming and programmable circuitscitations
- 2018Ion implantation in silicon for trimming the operating wavelength of ring resonatorscitations
- 2018Real-time monitoring and gradient feedback enable accurate trimming of ion-implanted silicon photonic devicescitations
- 2017Towards autonomous testing of photonic integrated circuitscitations
- 2017Phase trimming of Mach-Zehnder Interferometers by laser annealing of germanium implanted waveguidescitations
- 2017Post-fabrication phase trimming of Mach-Zehnder Interferometers by laser annealing of germanium implanted waveguidescitations
- 2017Trimming of ring resonators via ion implantation in siliconcitations
- 2014Silicon-based photonic integration beyond the telecommunication wavelength rangecitations
- 2014Long-wavelength silicon photonic integrated circuits
- 2014Mid-IR heterogeneous silicon photonicscitations
Places of action
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conferencepaper
Towards autonomous testing of photonic integrated circuits
Abstract
A crucial component of any large scale manufacturing line is the development of autonomous testing at the wafer scale. This work offers a solution through the fabrication of grating couplers in the silicon-on-insulator platform via ion implantation. The grating is subsequently erased after testing using laser annealing without affecting the optical performance of the photonic circuit. Experimental results show the possibility for the realisation of low loss, compact solutions which may revolutionise photonic wafer-scale testing. The process is CMOS compatible and can be implemented in other platforms to realise more complex systems such as multilayer photonics or programmable optical circuits.